(1) Field of the Invention
The present invention relates to a circuit configuration of a DBS tuner for satellite broadcasting receivers, and in particular relates to a DBS tuner for satellite broadcasting receivers wherein an attenuating filter (trapping circuit) using a microstrip line is provided on the printed circuit board.
(2) Description of the Prior Art
In a general satellite broadcasting receiving system, ground waves of the 12 GHz band are collected first by a BS antenna, and a BS converter converts the 12 GHz band frequency into a high-frequency signal of the 1 GHz band (900 to 2150 MHz). This is introduced to a DBS tuner where a desired signal channel is selected from the 1 GHz band signals sent from the BS converter so that the selected signal is converted into the intermediate frequency signal (402.78 MHz). Here, DBS represents direct broadcasting satellite, and means a system which directly receives broadcast signals from communications satellites.
FIG. 1 shows an example of a circuit block diagram of a conventional DBS tuner for satellite broadcasting receivers. The double line connecting different circuit portions represents the RF signal line; the single line represents the power line.
In a conventional DBS tuner, an input signal of the 1 GHz band applied to an input terminal 51 is made to pass through a wideband amplifier or RF circuit portion 52, an attenuator 53, a tracking filter 54 to be supplied to a mixer 55. The locally generated signal from a local oscillator circuit portion 56 is inputted to a PLL (phase-locked loop) 58 through a high-pass filter 57. PLL 58 operates so that the locally generated signal from local oscillator circuit portion 56 is phase-locked. The locally generated signal locked in phase is inputted to mixer 55 where it is converted into the intermediate frequency signal (IF signal). This IF signal is applied to an IF circuit portion 60 and inputted to a demodulating portion 61. A reference numeral 62 designates a power input terminal which is connected to RF circuit portion 52, mixer 55, PLL 58, local oscillator circuit portion 56, IF circuit portion 60 and demodulating portion 61. The frequency of the IF signal output in this case is 402.78 MHz. RF circuit portion 52 and IF circuit portion 60 process a modulated signal. Demodulator 61 detects and demodulates the modulated signal to output it as a detected signal. The RF circuit portion operates so as to adjust the level of the attenuator, which is a circuit provided to keep the signal at a constant level free from distortion even if the level of the RF input signal level varies.
The signal lines connecting various portions, specifically, input terminal 51, RF circuit portion 52, attenuator 53, tracking filter 54, mixer 55, PLL 58, local oscillator circuit portion 56, IF circuit portion 60, power terminal 62 and demodulator 61, is composed of copper foil leads provided on the printed circuit board as shown in FIG. 4. Designated at 65 in FIG. 4 is a dielectric support of the printed circuit board, 66 a signal line and 67 a copper foil layer formed on the underside of the printed circuit board. Signal line 66 is provided in the form of a simple strip-like conductor.
The circuit configuration of the conventional DBS tuner for satellite broadcasting receivers, has a means for preventing leakage of the locally generated signal (including fundamental harmonic, second order harmonic, third order harmonic) from the input terminal. This means is provided as a low-pass filter connected to GND 70 and composed of a chip capacitor 68 and a strip line 69 as shown in FIG. 2, for example, inside RF circuit portion 52 or tracking filter 54 such as .lambda./2 type band-pass filter (B.P.F) or .lambda./4 type B.P.F, etc., so as to damp the aforementioned signal.
Further, to prevent leakage of the locally generated signal (including fundamental harmonic, second order harmonic, third order harmonic) from the power supply terminal, a bypass capacitor 71 as shown in FIG. 3 is connected to GND 70 to damp the signal.
In the conventional DBS tuner for satellite broadcasting receivers, in order to prevent entrance of the second and third harmonic components of the locally generated signal from local oscillator circuit 56 into PLL circuit 58, the aforementioned bypass capacitor, for example, is connected between the locally generated signal transmission line and the GND, as shown in FIG. 1, so as to damp the higher harmonic components.
As a technique for preventing entrance of the higher harmonic components of the VCO oscillating signal into the demodulator, the aforementioned bypass capacitor is connected between a RFAGC line 59 and GND (earth) to damp the higher harmonics. RFAGC line 59 is a high-frequency line which connects attenuator 53 with demodulator 61.
Concerning prevention of leakage of the locally generated signal from the high-frequency input terminal, it is possible in the prior art to sufficiently attenuate the fundamental wave, but it is impossible to damp the higher frequency ranges, i.e., the second and third order harmonics, causing leakage from the high-frequency input terminal. This can be attributed to the increase in the inductance component of the leads and electrodes of the chip capacitor constituting the filter, accompanied by the augmentation of the frequencies of the second and third order harmonics. It is also attributed to a change in the inductance components of the strip lines depending upon frequencies. The leakage of the locally generated signal from the high-frequency input terminal will cause interference in the reception of other DBS tuners connected to the common cable and other appliances.
Here, the fundamental wave of the locally generated signal of DBS tuners for satellite broadcasting receivers is within 1300 MHz to 2550 MHz. The frequency of its second order harmonic falls within (1300 MHz to 2550 MHz).times.2 and the frequency of its third order harmonic falls within (1300 MHz to 2550 MHz).times.3.
The frequency of the fundamental wave of the VCO oscillating signal is 402.78 MHz. The frequency of its second order harmonic is 402.78 MHz.times.2, and the frequency of its third order harmonic is 402.78 MHz.times.3.
Concerning the protection against interference caused by the second and third order harmonics of the locally generated signal inputted from the local oscillator circuit to the PLL circuit portion, in the prior art, since the self-resonance frequency (about 1 GHz) of the bypass capacitor (of, e.g., about 1000 pF) is lower than the frequency of the locally generated signal (about 1300 MHz to 2550 MHz), the inductance of the leads and electrodes of the chip capacitor is consequently large so that it is impossible to sufficiently attenuate the signal component to the GND (earth).
Thus, various causes give rise to a problem that the harmonic components enter the PLL circuit, resultantly, the conventional configuration suffers from malfunction of channel section in the PLL circuit.
Concerning the protection against the leakage of the locally generated signal (including fundamental harmonic, second order harmonic, third order harmonic) from the power supply terminal, in the prior art, the leakage of the aforementioned signal causes unwanted radiation from the appliance incorporating the DBS tuner.
Concerning the protection against interference caused by the VCO oscillating signal harmonic components from the demodulating circuit portion through the RFAGC line, the prior art technology cannot sufficiently attenuate them because of the augmentation of the inductance component in the aforementioned bypass capacitor. Therefore, if the receiver receives a RF signal having a frequency (about 1.2 GHz, 1.6 GHz, 2.0 GHz) which is close to the VCO oscillating signal harmonics, the aforementioned harmonic components cause beats if it returns to the RF signal line.